IEEEPSRS – Integrated Injection Logic – Table of Contents

1. Introduction

3. Part I: Conventional I²L

  • 5. Integrated Injection Logic: A New Approach to LSI, K. Hart and A. Slob (IEEE Journal of Solid-State Circuits, October 1972)
  • 11. Integrated Injection Logic (I²L), C. M. Hart and A. Slob (Philips Technical Review, March 1973)
  • 21. Merged-Transistor Logic (MTL)-A Low-Cost Bipolar Logic Concept, H. H. Berger and S. K. Wiedmann (IEEE Journal of Solid-State Circuits, October 1972) .
  • 28. I²L Takes Bipolar Integration a Significant Step Forward, R. L. Horton, J. Englade, and G. McGee (Electronics, February 6. 1975)

37. Part II: Injection Coupled Logic

  • 39. Current Hogging Logic (CHL)-A New Bipolar Logic for SI, H. Lehning (IEEE Journal of Solid-State Circuits, October 1974)
  • 45. Current Hogging Injection Logic-A New Logic with High Functional Density, R. Müller (IEEE Journal of Solid-Stat Circuits. October 1975)
  • 50. Computer-Aided Device Modeling and Design Procedure for Current Hogging Logic (CHL), A. W. Wieder, W. L. Engl, and H. Lehning (IEEE Journal of Solid-State Circuits, October 1975)
  • 58. Injection-Coupled Synchronous Logic, N. Friedman, C. A. T. Salama, and P. M. Thompson (IEEE Journal of Solid-State Circuits, October 1978)

65. Part III: Second Generation I²L: Structures and Fabrication Techniques

  • 67. Second Generation I²L/MTL: A 20 ns Process/Structure, J. M. Herman, Ill, S. A. Evans, and B. J. Sloan, Jr. (IEEE Journal of Solid-State Circuits, April 1977)
  • 75. I²L with a Self-Aligned Double-Diffused Injector, Y. Tokumaru, M. Nakai, S. Shinozaki, S. Ito, and Y. Nishi (IEEE Journal of Solid-State Circuits, April 1977) .
  • 80. Buried Injector Logic: Second Generation I²L Performance, A. A. Yiannoulos (IEEE International Solid-State Circuits Conference, February 1978)
  • 82. Schottky I²L, F. W. Hewlett, Jr. (IEEE Journal of Solid-State Circuits, October 1975)
  • 88. Advanced Merged Transistor Logic by Using Schottky Junctions, H. H. Berger and S. K. Wiedmann (Microelectronics, March 1976)
  • 96. Schottky I²L (Substrate Fed Logic)-An Optimum Form of IL, P. S. Walsh and G. W. Sumerling (IEEE Journal of Solid-State Circuits, April 1977)
  • 101. Schottky Collector I²L, S. C. Blackstone and R. P. Mertens (IEEE Journal of Solid-State Circuits, June 1977)

107. Part IV: I²L Device Physics, Models, and LSI Simulation

  • Device Physics of Integrated Injection Logic, F. M. Klaassen (IEEE Transactions on Electron Devices, March 1975)
  • Terminal-Oriented Model for Merged Transistor Logic (MTL), H. H. Berger and S. K. Wiedmann (IEEE Journal of Solid-State Circuits, October 1974)
  • The Injection Model-A Structure-Oriented Model for Merged Transistor Logic (MTL), H. H. Berger (IEEE Journal of Solid-State Circuits, October 1974) .
  • An Evaluation of Injection Modeling, R. C. Jaeger (Solid-State Electronics, July 1976)
  • Evaluation of Electron Injection Current Density in p-Layers for Injection Modeling of I²L, H. H. Heimeier and H. H. Berger (IEEE Journal of Solid-State Circuits, April 1977)
  • Base Current of I²L Transistors, H. E. J. Wulms (IEEE Journal of Solid-State Circuits, April 1977)
  • Characteristics of I²L at Low Current Levels, W. H. Mattheus, R. P. Mertens, and J. D. Stulting (IEEE Transactions on Electron Devices, October 1977)
  • Modeling of Schottky Coupled Transistor Logic, S. C. Blackstone and R. P. Mertens (IEEE Journal of Solid-State Circuits, December 1978) .
  • The Effect of Base Resistance of the Vertical NPN Transistor in I²L Structures, N. Kirschner (Solid-State Electronics, July 1977)
  • Dynamic Behavior of Active Charge in I²L Transistors, J. Lohstroh (IEEE International Solid-State Circuits Conference, February 1976)
  • 172. Modeling the Dynamic Behavior of I²L, W. H. Mattheus, R. P. Mertens, and L. De Smet (IEEE Journal of Solid-State Circuits, April 1977)
  • 180. The Effect of Base Contact Position on the Relative Propagation Delays of the Multiple Outputs of an I²L Gate, D. V. Kerns, Jr. (IEEE Journal of Solid-State Circuits, October 1976)
  • 186. Schottky I²L (Substrate Fed Logic)-An Analysis of the Implications of the Vertical Injector Structure and Schottky Collection, V. Blatt and G. W. Sumerling (IEEE Journal of Solid-State Circuits, April 1977)
  • 193. Computer-Aided Design of Large-Scale Integrated I²L Logic Circuits, E. Wittenzellner (IEEE Journal of Solid-State Circuits, April 1977)
  • 199. SIMPIL: A Simulation Program for Injection Logic, G. R. Boyle (IEEE International Symposium on Circuits and Systems, May 1978)

205. Part V: High Performance I²L Structures

  • 208. Considerations for High-Speed and Analog-Circuit-Compatible |2L and the Analysis of Poly 17L, R. D. Davies and J. D. Meindl (IEEE Journal of Solid-State Circuits, October 1979)
  • 219. An Investigation of the Intrinsic Delay (Speed Limit) in MTL/I²L, H. H. Berger and K. Helwig (IEEE Journal of Solid-State Circuits, April 1979) .
    230. Scaling 17L for VLSI, S. A. Evans (IEEE Journal of Solid-State Circuits, April 1979)
  • 239. A Comparison of High-Speed 17L Structures, S. C. Blackstone and R. P. Mertens (IEEE Journal of Solid-State Circuits, December 1978)
  • 242. High Speed Integrated Injection Logic (I²L), C. Mulder and H. E. J. Wulms (IEEE Journal of Solid-State Circuits, June 1976)
  • 249. A New High Speed 17L Structure, B. B. Roesner and D. J. McGreivy (IEEE Journal of Solid-State Circuits, April 1977)
  • 254. High Performance “Upward” Bipolar Technology for VLSI, J. Agraz-Guerena, R. L. Pritchett, and P. T. Panousis (International Electron Devices Meeting Digest of Technical Papers, December 1978)
  • 258. Schottky-Base I²L: A High-Performance LSI Technology, A. Bahraman, S. Y. S. Chang, D. E. Romeo, and K. K. Schuegraf (IEEE Journal of Solid-State Circuits, June 1979) .
  • 265. Modeling of the Diode Input I²L Structure, G. Perlegos and S.-P. Chan (IEEE Journal of Solid-State Circuits, June 1979) .

269. Part VI: Novel I²L Techniques: Logic, Circuits, and Layouts

  • 270. Threshold I²L and its Applications to Binary Symmetric Functions and Multivalued Logic, T. T. Dao (IEEE Journal of Solid-State Circuits, October 1977)
  • 280. Realization of a Multivalued Integrated Injection Logic (MI²L) Full Adder, N. Friedman, C. A. T. Salama, F. E. Holmes, and P. M. Thompson (IEEE Journal of Solid-State Circuits, October 1977)
  • 283. Stacked I²L Circuit, K. Kaneko, T. Okabe, and M. Nagata (IEEE Journal of Solid-State Circuits, April 1977)
  • 286. Enhanced Integrated Injection Logic Performance Using Novel Symmetrical Cell Topography, L. J. Ragonese and N. T. Yang (International Electron Devices Meeting Digest of Technical Papers, December 1977)

291. Part VII: Analog Integrated Circuit Process Compatible I²L

  • 292. Processing Technology and AC/DC Characteristics of Linear Compatible I²L, J. L. Saltich, W. L. George, and J. G. Soderberg (IEEE Journal of Solid-State Circuits, August 1976)
  • 300. Linear Compatible I²L Technology with High Voltage Transistors, G. Bergman (IEEE Journal of Solid-State Circuits, October 1977)
  • 307. A New High-Voltage Analog-Compatible I²L Process, D. J. Allstot, S. K. Lui, T. S. T. Wei, P. R. Gray and R. G. Meyer (IEEE Journal of Solid-State Circuits, August 1978)
  • 311. I²L and High-Voltage Analog Circuitry on the Same Chip: A Comparison between Various Combination Processes, L. Halbo and T. A. Hansen (IEEE Journal of Solid-State Circuits, August 1979)

317. Part VIII: Applications

  • 318. An I²L Watch Chip with Direct LED Drive, P. A. Tucci and L. K. Russell (IEEE Journal of Solid-State Circuits, December 1976)
  • 323. I²L Timing Circuit for the 1 ms-10 s Range, R. Müller (IEEE Journal of Solid-State Circuits, April 1977)
  • 328. The TDA1077-An I²L Circuit for Two-Tone Telephone Dialing, D. J. G. Janssen, J.-C. Kaire, and P. Guétin (IEEE Journal of Solid-State Circuits, June 1977)
  • 333. A One-Chip I²L Controller for Appliances, G. Bergmann (IEEE Journal of Solid-State Circuits, June 1979)
  • 338. A Monolithic 10-Bit A/D Using I²L and LWT Thin-Film Resistors, A. P. Brokaw (IEEE Journal of Solid-State Circuits, December 1978)
  • 348. I²L LSI Design with Mask Programmable Arrays, L. Chan and E. Coussens (1977 WESCON Technical Papers, September 1977)

353. Part IX: I²L Memory Techniques .

  • 355. Small-Size Low-Power Bipolar Memory Cell, S. K. Wiedmann and H. H. Berger (IEEE Journal of Solid-State Circuits, October 1971)
  • 361. Write-Current Control and Self-Powering in a Low-Power Memory Cell, H. H. Berger, R. Schnadt, and S. K. Wiedmann (IEEE Journal of Solid -State Circuits, June 1973)
  • 363. Superintegrated Memory Shares Functions on Diffused Islands, S. K. Wiedmann and H. H. Berger (Electronics, February 14. 1972) .
  • 367. A 4K-bit Static I²L Memory, K. Kawarada, M. Suzuki, T. Havashi, K. Tovada, and C. Ohno (IEEE Transactions on Electron Devices, June 1979)
  • 374. Injection-Coupled Memory: A High-Density Static Bipolar Memory, S. K. Wiedmann (IEEE Journal of Solid-State Circuits, October 1973)
  • 380. The Collector-Coupled Static RAM Cell, F. W. Hewlett, Jr. WEEE Journal of Solid-State Circuits, October 1979)

383. Part X: Reliability and Radiation Hardness

  • 384. The Reliability of Integrated Injection Logic Circuits for the Bell System, F. W. Hewlett, Jr., and R. A. Pedersen, (Pro-
    ceedings of the 14th Annual IEEE Reliability Physics Symposium, April 1976)
  • 390. A Comparative Evaluation of Integrated Injection Logic, J. P. Raymond and R. L. Pease (IEEE Transactions on Nuclear Science, December 1977)
  • 399. Radiation-Hardened Performance-Optimized 12L LSI, A. Bahraman, S. Chang, D. Romeo, K. Schuegraf, and T. Wong (IEEE Transactions on Nuclear Science, December 1977)
  • 405. Radiation Hardened LSI for the 1980’s: CMOS/SOS vs 12L, R. P. Donovan, M. Simons, R. M. Burger (IEEE Transactions on Nuclear Science, December 1977)

411. Bibliography

415. Author Index

417. Subject Index

421. Editor’s Biography